instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated.
  采用了两种存储器体系结构，寻址方式的模拟不仅保证了正确地确定操作数，而且能够正确统计指令执行时间。
• Propose the run time dispatched instruction decoder and issue logic based on instruction execution cycle.
  提出基于指令类型动态分配的译码器设计方案和基于指令执行周期的动态逻辑发射方案。
• This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
  本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。
• The Digital Signal Processing which is regarded as CPU on board has some advantages, such as fast instruction execution, high bus bandwidth, and high speed real-time data processing.
  数据采集卡部分使用使用DSP来作采集卡CPU具有指令执行速度快、总线带宽高、可以完成数据的高速实时处理等优点。
• Research and Analysis of the Value Prediction and Instruction Reuse Techniques in Speculated Execution
  推测执行中值预测与指令重用技术的研究与分析
• In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
  在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。
• In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the video processing instruction.
  为有效实现扩展指令，处理器执行级采用了可扩展流水级技术。
• As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
  作为SOC的核心，CPU的性能主要取决于指令的执行效率，而采用流水线方式大大增加了指令的执行速度，提高了CPU的性能。
• Traditional programming model like C, C++ and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure.
  C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。
• Bochs was developed purely in the C++ language for interpreted x86 instruction execution and platform emulation.
  对于解译的x86指令执行和平台仿真，Bochs完全是用C++语言开发的。